The present invention generally relates to integrated circuits, and more specifically, to autozero to an offset value for a slope detector for voltage droop monitoring in integrated circuits.
In high performance processors or other integrated circuits, to increase the processing performance of the processor, the processor chip design may include one or more of one or more processor cores and one or more pipelines connecting the processor cores. In addition, in a high performance system, processor system designs often include multiple chips sharing a common supply rail of a power distribution network providing a supply voltage. As the number of processor cores on a same chip or across multiple chips, all sharing a common supply rail, increases, the number of circuits that switch per clock cycle also increases.
In a processor there is noise generated by circuit switching activity at each clock cycle by nodes, busses, and other circuit components sharing a common supply rail. One result of noise generated by circuit switching activity, also referred to as power grid noise or di/dt noise, is that a sudden increase in noise may induce a droop in the supply voltage to the common supply rail of the power distribution network. A sudden, large droop in the supply voltage slows down the circuit response and therefore may cause timing errors on the logical circuit.